Zone storage - quickly returning to a state of consistency following an unexpected event

ABSTRACT

Systems and Methods for data storage in a distributed storage network are disclosed. Unexpected errors can adversely affect consistency of both the content of a write (including the slice data), and the synchronicity between the written slices and metadata structures. To maintain consistency between these data structures, a sequencing of the order of writes and flushes to the memory devices for the different data structures may be enforced as follows: First: Slice content data is first written to the volatile memory (e.g. a cache memory) of a DS unit; Second: the Slice content data stored in volatile memory is “flushed” to a non-volatile bin (which bin is associated with a group of physical memory blocks in non-volatile memory); Third: after the flush of the slice content data to the bin (i.e. data is durable on the media device): metadata relating to the data is written.

STATEMENT REGARDING FEDERALLY SPONSORED RESEARCH OR DEVELOPMENT

Not Applicable.

INCORPORATION-BY-REFERENCE OF MATERIAL SUBMITTED ON A COMPACT DISC

Not Applicable.

BACKGROUND OF THE INVENTION Technical Field of the Invention

This invention relates generally to computer networks, and more particularly to dispersed or cloud storage.

Description of Related Art

Computing devices are known to communicate data, process data, and/or store data. Such computing devices range from wireless smart phones, laptops, tablets, personal computers (PC), work stations, and video game devices, to data centers that support millions of web searches, stock trades, or on-line purchases every day. In general, a computing device includes a central processing unit (CPU), a memory system, user input/output interfaces, peripheral device interfaces, and an interconnecting bus structure.

As is further known, a computer may effectively extend its CPU by using “cloud computing” to perform one or more computing functions (e.g., a service, an application, an algorithm, an arithmetic logic function, etc.) on behalf of the computer. Further, for large services, applications, and/or functions, cloud computing may be performed by multiple cloud computing resources in a distributed manner to improve the response time for completion of the service, application, and/or function. For example, Hadoop is an open source software framework that supports distributed applications enabling application execution by thousands of computers.

In addition to cloud computing, a computer may use “cloud storage” as part of its memory system. As is known, cloud storage enables a user, via its computer, to store files, applications, etc. on a remote or Internet storage system. The remote or Internet storage system may include a RAID (redundant array of independent disks) system and/or a dispersed storage system that uses an error correction scheme to encode data for storage.

In a RAID system, a RAID controller adds parity data to the original data before storing it across an array of disks. The parity data is calculated from the original data such that the failure of a single disk typically will not result in the loss of the original data. While RAID systems can address certain memory device failures, these systems may suffer from effectiveness, efficiency and security issues. For instance, as more disks are added to the array, the probability of a disk failure rises, which may increase maintenance costs. When a disk fails, for example, it needs to be manually replaced before another disk(s) fails and the data stored in the RAID system is lost. To reduce the risk of data loss, data on a RAID device is often copied to one or more other RAID devices. While this may reduce the possibility of data loss, it also raises security issues since multiple copies of data may be available, thereby increasing the chances of unauthorized access. In addition, co-location of some RAID devices may result in a risk of a complete data loss in the event of a natural disaster, fire, power surge/outage, etc.

BRIEF DESCRIPTION OF THE SEVERAL VIEWS OF THE DRAWING(S)

FIG. 1 is a schematic block diagram of an embodiment of a dispersed, or distributed, storage network (DSN) in accordance with the present disclosure;

FIG. 2 is a schematic block diagram of an embodiment of a computing core in accordance with the present disclosure;

FIG. 3 is a schematic block diagram of an example of dispersed storage error encoding of data in accordance with the present disclosure;

FIG. 4 is a schematic block diagram of a generic example of an error encoding function in accordance with the present disclosure;

FIG. 5 is a schematic block diagram of a specific example of an error encoding function in accordance with the present disclosure;

FIG. 6 is a schematic block diagram of an example of slice naming information for an encoded data slice (EDS) in accordance with the present disclosure;

FIG. 7 is a schematic block diagram of an example of dispersed storage error decoding of data in accordance with the present disclosure;

FIG. 8 is a schematic block diagram of a generic example of an error decoding function in accordance with the present disclosure;

FIG. 9 is a schematic block diagram of an example of a dispersed storage network in accordance with the present disclosure;

FIG. 10A is a schematic block diagram of an example of a dispersed storage network in accordance with the present disclosure; and

FIG. 10B is a flowchart illustrating an example of a data storage process in accordance with the present disclosure.

DETAILED DESCRIPTION OF THE INVENTION

FIG. 1 is a schematic block diagram of an embodiment of a dispersed, or distributed, storage network (DSN) 10 that includes a plurality of dispersed storage (DS) computing devices or processing units 12-16, a DS managing unit 18, a DS integrity processing unit 20, and a DSN memory 22. The components of the DSN 10 are coupled to a network 24, which may include one or more wireless and/or wire lined communication systems; one or more non-public intranet systems and/or public internet systems; and/or one or more local area networks (LAN) and/or wide area networks (WAN).

The DSN memory 22 includes a plurality of dispersed storage units 36 (DS units) that may be located at geographically different sites (e.g., one in Chicago, one in Milwaukee, etc.), at a common site, or a combination thereof. For example, if the DSN memory 22 includes eight dispersed storage units 36, each storage unit is located at a different site. As another example, if the DSN memory 22 includes eight storage units 36, all eight storage units are located at the same site. As yet another example, if the DSN memory 22 includes eight storage units 36, a first pair of storage units are at a first common site, a second pair of storage units are at a second common site, a third pair of storage units are at a third common site, and a fourth pair of storage units are at a fourth common site. Note that a DSN memory 22 may include more or less than eight storage units 36.

DS computing devices 12-16, the managing unit 18, and the integrity processing unit 20 include a computing core 26, and network or communications interfaces 30-33 which can be part of or external to computing core 26. DS computing devices 12-16 may each be a portable computing device and/or a fixed computing device. A portable computing device may be a social networking device, a gaming device, a cell phone, a smart phone, a digital assistant, a digital music player, a digital video player, a laptop computer, a handheld computer, a tablet, a video game controller, and/or any other portable device that includes a computing core. A fixed computing device may be a computer (PC), a computer server, a cable set-top box, a satellite receiver, a television set, a printer, a fax machine, home entertainment equipment, a video game console, and/or any type of home or office computing equipment. Note that each of the managing unit 18 and the integrity processing unit 20 may be separate computing devices, may be a common computing device, and/or may be integrated into one or more of the computing devices 12-16 and/or into one or more of the dispersed storage units 36.

Each interface 30, 32, and 33 includes software and/or hardware to support one or more communication links via the network 24 indirectly and/or directly. For example, interface 30 supports a communication link (e.g., wired, wireless, direct, via a LAN, via the network 24, etc.) between computing devices 14 and 16. As another example, interface 32 supports communication links (e.g., a wired connection, a wireless connection, a LAN connection, and/or any other type of connection to/from the network 24) between computing devices 12 and 16 and the DSN memory 22. As yet another example, interface 33 supports a communication link for each of the managing unit 18 and the integrity processing unit 20 to the network 24.

In general, and with respect to DS error encoded data storage and retrieval, the DSN 10 supports three primary operations: storage management, data storage and retrieval. More specifically computing devices 12 and 16 include a dispersed storage (DS) client module 34, which enables the computing device to dispersed storage error encode and decode data (e.g., data object 40) as subsequently described with reference to one or more of FIGS. 3-8. In this example embodiment, computing device 16 functions as a dispersed storage processing agent for computing device 14. In this role, computing device 16 dispersed storage error encodes and decodes data on behalf of computing device 14. With the use of dispersed storage error encoding and decoding, the DSN 10 is tolerant of a significant number of storage unit failures (the number of failures is based on parameters of the dispersed storage error encoding function) without loss of data and without the need for a redundant or backup copies of the data. Further, the DSN 10 stores data for an indefinite period of time without data loss and in a secure manner (e.g., the system is very resistant to unauthorized attempts at accessing or hacking the data).

The second primary function (i.e., distributed data storage and retrieval) begins and ends with a DS computing devices 12-14. For instance, if a second type of computing device 14 has data 40 to store in the DSN memory 22, it sends the data 40 to the DS computing device 16 via its interface 30. The interface 30 functions to mimic a conventional operating system (OS) file system interface (e.g., network file system (NFS), flash file system (FFS), disk file system (DFS), file transfer protocol (FTP), web-based distributed authoring and versioning (WebDAV), etc.) and/or a block memory interface (e.g., small computer system interface (SCSI), internet small computer system interface (iSCSI), etc.).

In operation, the managing unit 18 performs DS management services. For example, the managing unit 18 establishes distributed data storage parameters (e.g., vault creation, distributed storage parameters, security parameters, billing information, user profile information, etc.) for computing devices 12-16 individually or as part of a group of user devices. As a specific example, the managing unit 18 coordinates creation of a vault (e.g., a virtual memory block associated with a portion of an overall namespace of the DSN) within the DSN memory 22 for a user device, a group of devices, or for public access and establishes per vault dispersed storage (DS) error encoding parameters for a vault. The managing unit 18 facilitates storage of DS error encoding parameters for each vault by updating registry information of the DSN 10, where the registry information may be stored in the DSN memory 22, a computing device 12-16, the managing unit 18, and/or the integrity processing unit 20.

The DS error encoding parameters (e.g., or dispersed storage error coding parameters) include data segmenting information (e.g., how many segments data (e.g., a file, a group of files, a data block, etc.) is divided into), segment security information (e.g., per segment encryption, compression, integrity checksum, etc.), error coding information (e.g., pillar width, decode threshold, read threshold, write threshold, etc.), slicing information (e.g., the number of encoded data slices that will be created for each data segment); and slice security information (e.g., per encoded data slice encryption, compression, integrity checksum, etc.).

The managing unit 18 creates and stores user profile information (e.g., an access control list (ACL)) in local memory and/or within memory of the DSN memory 22. The user profile information includes authentication information, permissions, and/or the security parameters. The security parameters may include encryption/decryption scheme, one or more encryption keys, key generation scheme, and/or data encoding/decoding scheme.

The managing unit 18 creates billing information for a particular user, a user group, a vault access, public vault access, etc. For instance, the managing unit 18 tracks the number of times a user accesses a non-public vault and/or public vaults, which can be used to generate per-access billing information. In another instance, the managing unit 18 tracks the amount of data stored and/or retrieved by a user device and/or a user group, which can be used to generate per-data-amount billing information. As will be described in more detail in conjunction with FIG. 10A and 10B, usage can be determined by a managing unit 18 on a byte-hour basis.

As another example, the managing unit 18 performs network operations, network administration, and/or network maintenance. Network operations includes authenticating user data allocation requests (e.g., read and/or write requests), managing creation of vaults, establishing authentication credentials for user devices, adding/deleting components (e.g., user devices, storage units, and/or computing devices with a DS client module 34) to/from the DSN 10, and/or establishing authentication credentials for the storage units 36. Network operations can further include monitoring read, write and/or delete communications attempts, which attempts could be in the form of requests. Network administration includes monitoring devices and/or units for failures, maintaining vault information, determining device and/or unit activation status, determining device and/or unit loading, and/or determining any other system level operation that affects the performance level of the DSN 10. Network maintenance includes facilitating replacing, upgrading, repairing, and/or expanding a device and/or unit of the DSN 10.

To support data storage integrity verification within the DSN 10, the integrity processing unit 20 (and/or other devices in the DSN 10 such as managing unit 18) may assess and perform rebuilding of ‘bad’ or missing encoded data slices. At a high level, the integrity processing unit 20 performs rebuilding by periodically attempting to retrieve/list encoded data slices, and/or slice names of the encoded data slices, from the DSN memory 22. Retrieved encoded slices are assessed and checked for errors due to data corruption, outdated versioning, etc. If a slice includes an error, it is flagged as a ‘bad’ or ‘corrupt’ slice. Encoded data slices that are not received and/or not listed may be flagged as missing slices. Bad and/or missing slices may be subsequently rebuilt using other retrieved encoded data slices that are deemed to be good slices in order to produce rebuilt slices. A multi-stage decoding process may be employed in certain circumstances to recover data even when the number of valid encoded data slices of a set of encoded data slices is less than a relevant decode threshold number. The rebuilt slices may then be written to DSN memory 22. Note that the integrity processing unit 20 may be a separate unit as shown, included in DSN memory 22, included in the computing device 16, managing unit 18, stored on a DS unit 36, and/or distributed among multiple storage units 36.

FIG. 2 is a schematic block diagram of an embodiment of a computing core 26 that includes a processing module 50, a memory controller 52, main memory 54, a video graphics processing unit 55, an input/output (IO) controller 56, a peripheral component interconnect (PCI) interface 58, an IO interface module 60, at least one IO device interface module 62, a read only memory (ROM) basic input output system (BIOS) 64, and one or more memory interface modules. The one or more memory interface module(s) includes one or more of a universal serial bus (USB) interface module 66, a host bus adapter (HBA) interface module 68, a network interface module 70, a flash interface module 72, a hard drive interface module 74, and a DSN interface module 76.

The DSN interface module 76 functions to mimic a conventional operating system (OS) file system interface (e.g., network file system (NFS), flash file system (FFS), disk file system (DFS), file transfer protocol (FTP), web-based distributed authoring and versioning (WebDAV), etc.) and/or a block memory interface (e.g., small computer system interface (SCSI), internet small computer system interface (iSCSI), etc.). The DSN interface module 76 and/or the network interface module 70 may function as one or more of the interface 30-33 of FIG. 1. Note that the IO device interface module 62 and/or the memory interface modules 66-76 may be collectively or individually referred to as IO ports.

FIG. 3 is a schematic block diagram of an example of dispersed storage error encoding of data. When a computing device 12 or 16 has data to store it disperse storage error encodes the data in accordance with a dispersed storage error encoding process based on dispersed storage error encoding parameters. The dispersed storage error encoding parameters include an encoding function (e.g., information dispersal algorithm, Reed-Solomon, Cauchy Reed-Solomon, systematic encoding, non-systematic encoding, on-line codes, etc.), a data segmenting protocol (e.g., data segment size, fixed, variable, etc.), and per data segment encoding values. The per data segment encoding values include a total, or pillar width, number (T) of encoded data slices per encoding of a data segment (i.e., in a set of encoded data slices); a decode threshold number (D) of encoded data slices of a set of encoded data slices that are needed to recover the data segment; a read threshold number (R) of encoded data slices to indicate a number of encoded data slices per set to be read from storage for decoding of the data segment; and/or a write threshold number (W) to indicate a number of encoded data slices per set that must be accurately stored before the encoded data segment is deemed to have been properly stored. The dispersed storage error encoding parameters may further include slicing information (e.g., the number of encoded data slices that will be created for each data segment) and/or slice security information (e.g., per encoded data slice encryption, compression, integrity checksum, etc.).

In the present example, Cauchy Reed-Solomon has been selected as the encoding function (a generic example is shown in FIG. 4 and a specific example is shown in FIG. 5); the data segmenting protocol is to divide the data object into fixed sized data segments; and the per data segment encoding values include: a pillar width of 5, a decode threshold of 3, a read threshold of 4, and a write threshold of 4. In accordance with the data segmenting protocol, the computing device 12 or 16 divides the data (e.g., a file (e.g., text, video, audio, etc.), a data object, or other data arrangement) into a plurality of fixed sized data segments (e.g., 1 through Y of a fixed size in range of Kilo-bytes to Tera-bytes or more). The number of data segments created is dependent of the size of the data and the data segmenting protocol.

The computing device 12 or 16 then disperse storage error encodes a data segment using the selected encoding function (e.g., Cauchy Reed-Solomon) to produce a set of encoded data slices. FIG. 4 illustrates a generic Cauchy Reed-Solomon encoding function, which includes an encoding matrix (EM), a data matrix (DM), and a coded matrix (CM). The size of the encoding matrix (EM) is dependent on the pillar width number (T) and the decode threshold number (D) of selected per data segment encoding values. To produce the data matrix (DM), the data segment is divided into a plurality of data blocks and the data blocks are arranged into D number of rows with Z data blocks per row. Note that Z is a function of the number of data blocks created from the data segment and the decode threshold number (D). The coded matrix is produced by matrix multiplying the data matrix by the encoding matrix.

FIG. 5 illustrates a specific example of Cauchy Reed-Solomon encoding with a pillar number (T) of five and decode threshold number of three. In this example, a first data segment is divided into twelve data blocks (D1-D12). The coded matrix includes five rows of coded data blocks, where the first row of X11-X14 corresponds to a first encoded data slice (EDS 1_1), the second row of X21-X24 corresponds to a second encoded data slice (EDS 2_1), the third row of X31-X34 corresponds to a third encoded data slice (EDS 3_1), the fourth row of X41-X44 corresponds to a fourth encoded data slice (EDS 4_1), and the fifth row of X51-X54 corresponds to a fifth encoded data slice (EDS 5_1). Note that the second number of the EDS designation corresponds to the data segment number. In the illustrated example, the value X11=aD1+bD5+cD9, X12=aD2+bD6+cD10, . . . X53=mD3+nD7+oD11, and X54=mD4+nD8+oD12.

Returning to the discussion of FIG. 3, the computing device also creates a slice name (SN) for each encoded data slice (EDS) in the set of encoded data slices. A typical format for a slice name 80 is shown in FIG. 6. As shown, the slice name (SN) 80 includes a pillar number of the encoded data slice (e.g., one of 1-T), a data segment number (e.g., one of 1-Y), a vault identifier (ID), a data object identifier (ID), and may further include revision level information of the encoded data slices. The s lice name functions as at least part of a DSN address for the encoded data slice for storage and retrieval from the DSN memory 22.

As a result of encoding, the computing device 12 or 16 produces a plurality of sets of encoded data slices, which are provided with their respective slice names to the storage units for storage. As shown, the first set of encoded data slices includes EDS 1_1 through EDS 5_1 and the first set of slice names includes SN 1_1 through SN 5_1 and the last set of encoded data slices includes EDS 1_Y through EDS 5_Y and the last set of slice names includes SN 1_Y through SN 5_Y.

FIG. 7 is a schematic block diagram of an example of dispersed storage error decoding of a data object that was dispersed storage error encoded and stored in the example of FIG. 4. In this example, the computing device 12 or 16 retrieves from the storage units at least the decode threshold number of encoded data slices per data segment. As a specific example, the computing device retrieves a read threshold number of encoded data slices.

In order to recover a data segment from a decode threshold number of encoded data slices, the computing device uses a decoding function as shown in FIG. 8. As shown, the decoding function is essentially an inverse of the encoding function of FIG. 4. The coded matrix includes a decode threshold number of rows (e.g., three in this example) and the decoding matrix in an inversion of the encoding matrix that includes the corresponding rows of the coded matrix. For example, if the coded matrix includes rows 1, 2, and 4, the encoding matrix is reduced to rows 1, 2, and 4, and then inverted to produce the decoding matrix.

FIG. 9 is a diagram of an example of a dispersed storage network. The dispersed storage network includes a DS (dispersed storage) client module 34 (which may be in DS computing devices 12 and/or 16 of FIG. 1), a network 24, and a plurality of DS units 36-1 . . . 36-n (which may be storage units 36 of FIG. 1 and which form at least a portion of DS memory 22 of FIG. 1), a DSN managing unit 18, and a DS integrity verification module (not shown). The DS client module 34 includes an outbound DS processing section 81 and an inbound DS processing section 82. Each of the DS units 36-1 . . . 36-n includes a controller 86, a processing module 84 (e.g. computer processor) including a communications interface for communicating over network 24 (not shown), memory 88, a DT (distributed task) execution module 90, and a DS client module 34.

In an example of operation, the DS client module 34 receives data 92. The data 92 may be of any size and of any content, where, due to the size (e.g., greater than a few Terabytes), the content (e.g., secure data, etc.), and/or concerns over security and loss of data, distributed storage of the data is desired. For example, the data 92 may be one or more digital books, a copy of a company's emails, a large-scale Internet search, a video security file, one or more entertainment video files (e.g., television programs, movies, etc.), data files, and/or any other large amount of data (e.g., greater than a few Terabytes).

Within the DS client module 34, the outbound DS processing section 81 receives the data 92. The outbound DS processing section 81 processes the data 92 to produce slice groupings 96. As an example of such processing, the outbound DS processing section 81 partitions the data 92 into a plurality of data partitions. For each data partition, the outbound DS processing section 81 dispersed storage (DS) error encodes the data partition to produce encoded data slices and groups the encoded data slices into a slice grouping 96.

The outbound DS processing section 81 then sends, via the network 24, the slice groupings 96 to the DS units 36-1 . . . 36-n of the DSN memory 22 of FIG. 1. For example, the outbound DS processing section 81 sends slice group 1 to DS storage unit 36-1. As another example, the outbound DS processing section 81 sends slice group #n to DS unit #n.

In one example of operation, the DS client module 34 requests retrieval of stored data within the memory of the DS units 36. In this example, the task 94 is retrieve data stored in the DSN memory 22. Accordingly, and according to one embodiment, the outbound DS processing section 81 converts the task 94 into a plurality of partial tasks 98 and sends the partial tasks 98 to the respective DS storage units 36-1 . . . 36-n.

In response to the partial task 98 of retrieving stored data, a DS storage unit 36 identifies the corresponding encoded data slices 99 and retrieves them. For example, DS unit #1 receives partial task #1 and retrieves, in response thereto, retrieved slices #1. The DS units 36 send their respective retrieved slices 99 to the inbound DS processing section 82 via the network 24.

The inbound DS processing section 82 converts the retrieved slices 99 into data 92. For example, the inbound DS processing section 82 de-groups the retrieved slices 99 to produce encoded slices per data partition. The inbound DS processing section 82 then DS error decodes the encoded slices per data partition to produce data partitions. The inbound DS processing section 82 de-partitions the data partitions to recapture the data 92.

In one example of operation, the DSN of FIGS. 1 and 9 may be utilized for purposes of implementing a storage process which can facilitate quickly returning to a state of consistency following an unexpected event as explained below in conjunction with FIGS. 10A and 10B. Note, while these embodiments are described in the context of functionality provided by DS units 36, this functionality may be implemented utilizing any module and/or unit of the dispersed storage network (DSN), alone or in combination, including but not limited to DS Processing Unit 16, DS Processing Integrity Unit 20 and/or DS Managing Unit 18. Also note, while these embodiments are described in the context of storing slices of data, which can include dispersed storage error encoded data slices, data need not be stored in the form of slices for purposes of the storage process described below to work.

According to one example embodiment, data slices are stored to a memory device (e.g. DS unit 36) by adopting a pattern of append only writes, wherein writes of data to non-volatile memory continue from a point where the last write ended. One problem is Unexpected Events (UEs), which may include power off events, restarts, crashes, errors, or other similar unexpected events, and which can cause a disruption to one or more of the most recent writes. This can adversely affect consistency of both the content of the write (including the slice data), and the synchronicity between the written slices and related metadata structures (which can include catalogues of written slices and their size, a journal of bin locations, and other on-memory-device data structures). To maintain consistency between these different data structures, a sequencing of the order of writes and flushes to the memory devices for the different data structures may include the following: First: Slice content data is first written to the volatile memory (e.g. a cache memory) of a DS unit; Second: the Slice content data stored in volatile memory is “flushed” to a non-volatile bin (which bin is associated with a group of physical memory blocks in non-volatile memory); Third: after the flush of the slice content data to the bin (i.e. data is durable on the media device): metadata relating to the data is written. Metadata can include an in-ordered log of each update operation and slice name version and size information. The metadata may further include pointers to the bins which may be kept in a “Journal”, and slice name and size information which may be kept in a “Catalog”, or other index information about the bins that are stored. Note that the writing to the different metadata structures (e.g. the Journal and Catalog) may be performed sequentially (and in any order), or in parallel, and at any time after the Slice content data is stored in the bin, even following an Unexpected event. While the specific embodiments depicted in FIGS. 10A and 10B, and described below, involve a Journal and Catalog, these are merely non-limiting examples, and a person of skill in the art will appreciate that metadata related to data being stored can be organized and stored in many other ways.

If a UE occurs before the first step, no corrective action needs to take place because there is no slice write to be corrupted by the UE.

If the UE occurs after the first step, but before the second step, then there is the potential for a corrupted slice content to be written. To detect and correct from these, an “Atomic Write Structure” is used when the slices are written to volatile memory in the first step. An Atomic Write Structure is a defined structure of data written with the slice content data that can independently be used to recognize whether the slice content data was incompletely written, or completely written, by using at least one verifier, which can include: “defined headers”, “length indicators”, “defined footers”, and “data checksums”. If verifiers are detected and verified, then the Atomic Write Structure is assumed to be valid and is accepted along with the associated slice content data, otherwise it is known to be invalid and is skipped. In the case, it is skipped, there are no further recovery operations to be performed. The area is marked as invalid and future writes continue from the end of where the incomplete write left off.

Otherwise, if the slice data content is validated as complete by the Atomic Write Structure, or if the UE occurred after the second step, but before the third step, then there is a recoverable inconsistency. In this case, we have a bin that contains slice data that may not be referenced by either the catalog or the journal. In this case, the process determines all bin entries in bin files that are not in either the journal or the catalog, and then recover both by adding the appropriate missing metadata entries based on the discovered slice content data. Finding these inconstancies may be optimized by looking in the journal (i.e. performing a scan of metadata) for “safe point markers”, which are references to offsets in the bins that mark the most recent data the journal has referenced and synchronized. The process need only scan metadata from this offset to the write pointer—or last append point of the bin. Anything between the last safe point, and the write pointer of each bin that represents a complete write of slice content data is “replayed”. By replaying it brings to agreement the content of the bin and the journal and catalog, i.e. if the journal is missing an item, it will be added, and if the catalog is missing an entry for that slice it will be added.

Finally, after this recovery process, the safe point can be updated (if safe points are used as an optimization to speed recovery).

By using this write sequence and following the above recovery procedure, there is no point in which an UE can lead to loss of slice data content that was successfully written to the non-volatile memory device, and no point in which in inconsistency between the slice content and associated data structures cannot be corrected for slice data in either the volatile or non-volatile memory.

An example of a dispersed storage network for storing data is shown in FIG. 10A in accordance with an embodiment. As shown therein, the network includes DS processing unit 16 communicably coupled via network 24 to DS units (storage units) 36-1, 36-2, . . . 36-n, each of which unit has a respective processing module (84-1, 84-2, . . . 84-n) and a respective memory (88-1, 88-2, . . . 88-n), which memory can be made up on one or more physical or logical memories. As shown therein, each DS unit 36, may include a respective Bin (500-1, 500-2, . . . 500-n), a respective Journal (502-1, 502-2, . . . 502-n) and a respective Catalog (504-1, 504-2, . . . 504-n). DS processing unit 16 sends slice content data as data slices 508-1, 508-2, . . . 508-n to be stored in DS units 36-1, 36-2, . . . 36-n respectively. As shown in more detail with respect to DS unit 36-1, memory 88-1 is made up of volatile memory (e.g., a cache memory) 88-1A and non-volatile memory 88-1B. DS units 36-2 . . . 36-n could similarly include such volatile and non-volatile memory in their respective memories 88-2 . . . 88-n. An example process of storing the data slices 508, and generating and storing metadata relating thereto, is described below in conjunction with FIG. 10B in accordance with an embodiment of the invention.

Having reference to FIG. 10B, in a step 600, data (in this specific instance slice content data), which could be sent from DS processing unit 16 of FIG. 10A, is stored in the volatile memory of a DS unit (for example volatile memory 88-1A of DS unit 36-1 in FIG. 10A). Next, in a step 602, the processing module 84-1 of DS unit 36-1 in FIG. 10A for example, determines if the slice content data was completely written. If the slice content data was completely written, the process continues at step 604. Otherwise, the storing of data is incomplete and the process ends. In step 604, the slice content data is “flushed” to a bin (e.g. bin 500-1 stored in non-volatile memory 84-1B of DS unit 36-1 in FIG. 10A). Next, in a step 606, the processing module 84-1 of DS unit 36-1 for example, determines whether metadata data has been properly written. For example, in the context of FIG. 10A, the processing module 84-1 determines whether metadata relating to bin 500-1 and/or slice content data 508-1 is correctly written to Journal 501-1 and/or Catalog 504-1 of DS unit 36-1. If so, the storage process is complete. Otherwise, in a step 608, if there is metadata missing, the missing metadata is stored. In the context of FIG. 10A, processing module 84-1 of DS unit 36 would determine that there are bin entries in the bin files that are not properly reflected in either the Journal 501-1 or the Catalog 504-1 of DS. And if there are bin entries that are not in either the journal or the catalog, the missing entries are added to the journal and/or catalog respectively.

As may be used herein, the terms “substantially” and “approximately” provides an industry-accepted tolerance for its corresponding term and/or relativity between items. Such an industry-accepted tolerance ranges from less than one percent to fifty percent and corresponds to, but is not limited to, component values, integrated circuit process variations, temperature variations, rise and fall times, and/or thermal noise. Such relativity between items ranges from a difference of a few percent to magnitude differences. As may also be used herein, the term(s) “configured to”, “operably coupled to”, “coupled to”, and/or “coupling” includes direct coupling between items and/or indirect coupling between items via an intervening item (e.g., an item includes, but is not limited to, a component, an element, a circuit, and/or a module) where, for an example of indirect coupling, the intervening item does not modify the information of a signal but may adjust its current level, voltage level, and/or power level. As may further be used herein, inferred coupling (i.e., where one element is coupled to another element by inference) includes direct and indirect coupling between two items in the same manner as “coupled to”. As may even further be used herein, the term “configured to”, “operable to”, “coupled to”, or “operably coupled to” indicates that an item includes one or more of power connections, input(s), output(s), etc., to perform, when activated, one or more its corresponding functions and may further include inferred coupling to one or more other items. As may still further be used herein, the term “associated with”, includes direct and/or indirect coupling of separate items and/or one item being embedded within another item.

As may be used herein, the term “compares favorably”, indicates that a comparison between two or more items, signals, etc., provides a desired relationship. For example, when the desired relationship is that signal A has a greater magnitude than signal B, a favorable comparison may be achieved when the magnitude of signal A is greater than that of signal B or when the magnitude of signal B is less than that of signal A. As may be used herein, the term “compares unfavorably”, indicates that a comparison between two or more items, signals, etc., fails to provide the desired relationship.

As may also be used herein, the terms “processing module”, “processing circuit”, “processor”, and/or “processing unit” may be a single processing device or a plurality of processing devices. Such a processing device may be a microprocessor, micro-controller, digital signal processor, microcomputer, central processing unit, field programmable gate array, programmable logic device, state machine, logic circuitry, analog circuitry, digital circuitry, and/or any device that manipulates signals (analog and/or digital) based on hard coding of the circuitry and/or operational instructions. The processing module, module, processing circuit, and/or processing unit may be, or further include, memory and/or an integrated memory element, which may be a single memory device, a plurality of memory devices, and/or embedded circuitry of another processing module, module, processing circuit, and/or processing unit. Such a memory device may be a read-only memory, random access memory, volatile memory, non-volatile memory, static memory, dynamic memory, flash memory, cache memory, and/or any device that stores digital information. Note that if the processing module, module, processing circuit, and/or processing unit includes more than one processing device, the processing devices may be centrally located (e.g., directly coupled together via a wired and/or wireless bus structure) or may be distributedly located (e.g., cloud computing via indirect coupling via a local area network and/or a wide area network). Further note that if the processing module, module, processing circuit, and/or processing unit implements one or more of its functions via a state machine, analog circuitry, digital circuitry, and/or logic circuitry, the memory and/or memory element storing the corresponding operational instructions may be embedded within, or external to, the circuitry comprising the state machine, analog circuitry, digital circuitry, and/or logic circuitry. Still further note that, the memory element may store, and the processing module, module, processing circuit, and/or processing unit executes, hard coded and/or operational instructions corresponding to at least some of the steps and/or functions illustrated in one or more of the Figures. Such a memory device or memory element can be included in an article of manufacture.

One or more embodiments have been described above with the aid of method steps illustrating the performance of specified functions and relationships thereof. The boundaries and sequence of these functional building blocks and method steps have been arbitrarily defined herein for convenience of description. Alternate boundaries and sequences can be defined so long as the specified functions and relationships are appropriately performed. Any such alternate boundaries or sequences are thus within the scope and spirit of the claims. Further, the boundaries of these functional building blocks have been arbitrarily defined for convenience of description. Alternate boundaries could be defined as long as the certain significant functions are appropriately performed. Similarly, flow diagram blocks may also have been arbitrarily defined herein to illustrate certain significant functionality.

To the extent used, the flow diagram block boundaries and sequence could have been defined otherwise and still perform the certain significant functionality. Such alternate definitions of both functional building blocks and flow diagram blocks and sequences are thus within the scope and spirit of the claims. One of average skill in the art will also recognize that the functional building blocks, and other illustrative blocks, modules and components herein, can be implemented as illustrated or by discrete components, application specific integrated circuits, processors executing appropriate software and the like or any combination thereof.

In addition, a flow diagram may include a “start” and/or “continue” indication. The “start” and “continue” indications reflect that the steps presented can optionally be incorporated in or otherwise used in conjunction with other routines. In this context, “start” indicates the beginning of the first step presented and may be preceded by other activities not specifically shown. Further, the “continue” indication reflects that the steps presented may be performed multiple times and/or may be succeeded by other activities not specifically shown. Further, while a flow diagram indicates a particular ordering of steps, other orderings are likewise possible provided that the principles of causality are maintained.

The one or more embodiments are used herein to illustrate one or more aspects, one or more features, one or more concepts, and/or one or more examples. A physical embodiment of an apparatus, an article of manufacture, a machine, and/or of a process may include one or more of the aspects, features, concepts, examples, etc. described with reference to one or more of the embodiments discussed herein. Further, from Figure to Figure, the embodiments may incorporate the same or similarly named functions, steps, modules, etc. that may use the same or different reference numbers and, as such, the functions, steps, modules, etc. may be the same or similar functions, steps, modules, etc. or different ones.

Unless specifically stated to the contra, signals to, from, and/or between elements in a figure of any of the figures presented herein may be analog or digital, continuous time or discrete time, and single-ended or differential. For instance, if a signal path is shown as a single-ended path, it also represents a differential signal path. Similarly, if a signal path is shown as a differential path, it also represents a single-ended signal path. While one or more particular architectures are described herein, other architectures can likewise be implemented that use one or more data buses not expressly shown, direct connectivity between elements, and/or indirect coupling between other elements as recognized by one of average skill in the art.

The term “module” is used in the description of one or more of the embodiments. A module implements one or more functions via a device such as a processor or other processing device or other hardware that may include or operate in association with a memory that stores operational instructions. A module may operate independently and/or in conjunction with software and/or firmware. As also used herein, a module may contain one or more sub-modules, each of which may be one or more modules.

As may further be used herein, a computer readable memory includes one or more memory elements. A memory element may be a separate memory device, multiple memory devices, or a set of memory locations within a memory device. Such a memory device may be a read-only memory, random access memory, volatile memory, non-volatile memory, static memory, dynamic memory, flash memory, cache memory, and/or any device that stores digital information. The memory device may be in a form a solid state memory, a hard drive memory, cloud memory, thumb drive, server memory, computing device memory, and/or other physical medium for storing digital information. A computer readable memory/storage medium, as used herein, is not to be construed as being transitory signals per se, such as radio waves or other freely propagating electromagnetic waves, electromagnetic waves propagating through a waveguide or other transmission media (e.g., light pulses passing through a fiber-optic cable), or electrical signals transmitted through a wire.

While particular combinations of various functions and features of the one or more embodiments have been expressly described herein, other combinations of these features and functions are likewise possible. The present disclosure is not limited by the particular examples disclosed herein and expressly incorporates these other combinations. 

What is claimed is:
 1. A method of storing data comprising: writing slice content data to a volatile memory; flushing the slice content data to a bin in a non-volatile memory after determining the slice content data was completely written to the volatile memory; writing missing metadata corresponding to the slice content data after flushing the slice content data to the bin; and writing missing metadata corresponding to the bin after flushing the slice content data to the bin.
 2. The method of claim 1, wherein the slice content data is flushed to the bin in the non-volatile memory using a pattern of append only writes.
 3. The method of claim 1, wherein the metadata includes one or more of a pointer to the bin, and slice name and size information.
 4. The method of claim 1, wherein the step of writing missing metadata corresponding to the slice content data and the step of writing missing metadata corresponding to the bin are performed sequentially.
 5. The method of claim 1, wherein the step of writing missing metadata corresponding to the slice content data and the step of writing missing metadata corresponding to the bin are performed in parallel.
 6. The method of claim 1, wherein the slice content data is written to the volatile memory using an atomic write structure.
 7. The method of claim 6, wherein the atomic write structure includes one or more of defined headers, length indicators, defined footers and data checksums.
 8. The method of claim 1, further comprising the steps of: writing second slice content data to the volatile memory; determining that the second slice content data was incompletely written to the volatile memory; and marking an area of the volatile memory associated with the second slice content data as invalid.
 9. The method of claim 1, wherein the missing metadata is identified using by starting a scan of metadata at a safe point marker.
 10. The method of claim 9, further comprising updating the safe point marker after the step of writing the missing metadata corresponding to the slice content data and the bin in the non-volatile memory after flushing the slice content data to the bin.
 11. A dispersed storage unit for use in a dispersed storage network, the dispersed storage unit comprising: a communications interface; a volatile memory; a non-volatile memory; and a computer processor; wherein the non-volatile memory includes instructions for causing the computer processor to: write slice content data to the volatile memory; flush the slice content data to a bin in the non-volatile memory after a determination that the slice content data was completely written to the volatile memory; write missing metadata corresponding to the slice content data after the slice content data has been flushed to the bin; and write missing metadata corresponding to the bin after the slice content data has been flushed to the bin.
 12. The dispersed storage unit of claim 11, wherein the non-volatile memory further comprises instructions for causing the computer processor to flush the slice content data to the bin in the non-volatile memory using a pattern of append only writes.
 13. The dispersed storage unit of claim 11, wherein the metadata includes one or more of a pointer to the bin, and slice name and size information.
 14. The dispersed storage unit of claim 11, wherein the non-volatile memory further comprises instructions for causing the computer processor to write the missing metadata corresponding to the slice content data and instructions for causing the computer processor to write the missing metadata corresponding to the bin, sequentially.
 15. The dispersed storage unit of claim 11, wherein the non-volatile memory further comprises instructions for causing the computer processor to write the missing metadata corresponding to the slice content data and instructions for causing the computer processor to write the missing metadata corresponding to the bin, in parallel.
 16. The dispersed storage unit of claim 11, wherein the non-volatile memory further comprises instructions for causing the computer processor to write the slice content data to the volatile memory using an atomic write structure.
 17. The dispersed storage unit of claim 16, wherein the atomic write structure includes one or more of defined headers, length indicators, defined footers and data checksums.
 18. The dispersed storage unit of claim 11, wherein the non-volatile memory further comprises instructions for causing the computer processor to: write second slice content data to the volatile memory; determine that the second slice content data was incompletely written to the volatile memory; and mark an area of the volatile memory associated with the second slice data as invalid.
 19. A dispersed storage network comprising: a plurality of dispersed storage units; a dispersed storage processing unit wherein a first dispersed storage unit of the plurality of dispersed storage units includes: a volatile memory; a non-volatile memory; and a computer processor; wherein the non-volatile memory includes instructions for causing the computer processor to: write slice content data to the volatile memory; flush the slice content data to a bin in the non-volatile memory after a determination that the slice content data was completely written to the volatile memory; write missing metadata corresponding to the slice content data after the slice content data has been flushed to the bin; and write missing metadata corresponding to the bin after the slice content data has been flushed to the bin.
 20. The dispersed storage network of claim 19, wherein the non-volatile memory further comprises instructions for causing the computer processor to flush the slice content data to the bin in the non-volatile memory using a pattern of append only writes. 